1. Field of the Invention
The invention relates to a manufacturing technology of a semiconductor integrated circuit device, in particular, a technology that is effectively applied to a manufacturing technology of a semiconductor integrated circuit device, which detects a defect of a semiconductor wafer.
2. Description of the Related Art
In JP-A-2000-269108, a technology where a sensor is attached to semiconductor manufacturing apparatus and with waveform data of the attached sensor an abnormality in a process line is detected is disclosed.
Furthermore, in JP-T-2002-515650, a technology where by use of defect information of a semiconductor wafer the yield is improved is disclosed.
A semiconductor product is formed by repeatedly applying a layering process and a patterning process that uses a photolithography technology and an etching technology to a semiconductor wafer (hereinafter, referred to as wafer). Until a semiconductor product comes to completion, though different depending on products, 1000 to 2000 processes are necessary in total.
The wafers that are processed according to the respective processes such as the layering process and the patterning process are managed with a block of 25 wafers as one lot in a mass production factory of normal semiconductor products. In the respective processes, whether the wafer satisfies specifications determined so that semiconductor products that become complete products may operate as designed or not is checked.
However, as mentioned above, until a semiconductor product comes to completion, very many processes have to be passed. Accordingly, for instance, when all wafers in one lot are inspected (total inspection), the number of necessary inspection devices becomes huge, resulting in huge investment and a very long TAT (Turn Around Time) that is a time from an order reception from a customer to a product supply thereto. Accordingly, in the inspection, not the total inspection but the sampling inspection is carried out.
The specifications used in the sampling inspection of the respective processes are determined considering the dispersion of the respective wafers. When the wafers are subjected to the sampling inspection and found satisfying the specifications, defective products due to the process are not fundamentally generated.
However, when trouble of the semiconductor manufacturing apparatus or process abnormality occurs, off-specification wafers are generated in the lot. In particular, when the frequency of the off-specification wafers is low, the sampling inspection is very low in the detection probability and takes a very long time to detect. Accordingly, there is a problem in that off-specification faulty wafers are produced much.
An object of the invention is to provide a manufacturing method of a semiconductor integrated circuit device, which can detect in real-time an off-specification faulty wafer.
Furthermore, another object of the invention is to provide a manufacturing method of a semiconductor integrated circuit device that without taking much trouble of an engineer can efficiently detect an off-specification faulty wafer.
The foregoing and other objects of the invention and novel features thereof will be clarified from descriptions of the specification and attached drawings.